URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

Subversion Repositories raytrac

[/] - Rev 213

Rev	Log message	Author	Age	Path
193	WIP: Main Document	jguarin2002	4414d 00h	/
192	Some change I dont realize what is it in the design document (xls)	jguarin2002	4414d 12h	/
191	Reduced the implementation of Instruction Queue to 16 instructions rather than 32 and using registers in logic cells rather than M9Ks memory blocks.... finally the design fits.	jguarin2002	4414d 12h	/
190	M9K Block reduction. And Altera Compiler Directive was added to adder code to prevent unnecesary M9K block inferring...	jguarin2002	4418d 20h	/
189	Limiting Block size on the operands register to a maximum of 256	jguarin2002	4419d 02h	/
188	Fitting Report	jguarin2002	4420d 09h	/
187	Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq	jguarin2002	4420d 09h	/
186	Sopc claims that int is a name that conflicts with verilog or vhdl standards, so a change on the int port was made by renaming it to irq	jguarin2002	4420d 09h	/
185	Well mulblock was a void inside file....	jguarin2002	4420d 23h	/
184	Se quitó la palabra capítulo de los titulos de los capítulos.	jguarin2002	4421d 03h	/