URL https://opencores.org/ocsvn/rise/rise/trunk

Subversion Repositories rise

[/] - Rev 148

Rev	Log message	Author	Age	Path
128	Added multiplexer for output data. This mutliplexer decides on the adress of the last cycles if ordinary memory data or data of an extension module have to be passed on.	jlechner	6361d 13h	/
127	Changed high active resets to low active ones.	jlechner	6361d 13h	/
126	Added constant for cpu frequency (needed for UART)	trinklhar	6361d 19h	/
125	Fixed vhdl bugs	trinklhar	6361d 19h	/
124	Assigned UART signals to ports on top-level entity	trinklhar	6361d 19h	/
123	Removed UART again	trinklhar	6361d 20h	/
122	Removed UART again again	trinklhar	6361d 20h	/
121	Added address constants for uart access (memory mapped I/O)	trinklhar	6361d 20h	/
120	Added UART module to memory entity	trinklhar	6361d 20h	/
119	Uart wieder ausgebaut	trinklhar	6362d 15h	/