URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] - Rev 62

Rev	Log message	Author	Age	Path
42	Added support for filelist for Xilinx ISE XST synthesis	fafa1971	6333d 05h	/
41	Added copy of empty modules upon original SPARC copies	fafa1971	6333d 05h	/
40	First version of synthesis script for Xilinx ISE XST	fafa1971	6333d 05h	/
39	Empty modules for cacheless Simply RISC S1 Core	fafa1971	6333d 05h	/
38	Changed to compile (for now) the boot code.	fafa1971	6337d 04h	/
37	Memory image coming from the new boot.s	fafa1971	6337d 04h	/
36	Working boot code!!!	fafa1971	6337d 04h	/
35	Fixed Assembly comments ("//" had to become "!!").	fafa1971	6337d 05h	/
34	This file is useless.	fafa1971	6346d 13h	/
33	Added inclusion of defines.h in boot.s	fafa1971	6347d 04h	/