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Rev Log message Author Age Path
73 Testbed: Pins.tcl into TbdSdsyn.tcl, refs #17 rkastl 4925d 17h /
72 TbdSdsyn: +Pins.tcl, refs #17 rkastl 4925d 17h /
71 Testbed added to synthesis builds rkastl 4925d 17h /
70 Testbed: Status leds rkastl 4925d 17h /
69 TbdSd synthesis rkastl 4925d 17h /
68 Testbed for SD-CORE, refs #17 rkastl 4925d 17h /
67 IP added rkastl 4925d 17h /
66 SdTop: Synthesis works rkastl 4925d 17h /
65 SdTop: all sd pins rkastl 4925d 17h /
64 SdCommand: Gemeinsamen crc7 verwendet
SDController: + voltage checks, refs #15		 rkastl 4925d 17h /

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