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Rev Log message Author Age Path
106 checked in orp_soc project step 2 jt_eaton 4533d 18h /
105 moved or1200_monitor from testbench to dut jt_eaton 4536d 14h /
104 fixed search in preprocessor script
added initial orp_soc project
jt_eaton 4538d 15h /
103 added user guide
resynced to local repository
jt_eaton 4558d 15h /
102 all ip-xact files now readable by kactus2 jt_eaton 4620d 11h /
101 Added new designs for minsoc release candidate
convert tool set to parse proper ip-xact

THIS WILL BREAK ALL THE OLD DESIGNS UNTIL I FIX THEIR IP_XACT
jt_eaton 4621d 12h /
100 created workspace prroject=fpga_mrisc for single compile
general cleanup
jt_eaton 4633d 20h /
99 moved all projects into /projects/opencores.org
added build_register
added fizzim
jt_eaton 4676d 13h /
98 removed unneeded sim jt_eaton 4712d 16h /
97 changed sim run directory to icarus
added ise directory into syn
added _tb testbench file to all sims
jt_eaton 4712d 18h /

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