URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] - Rev 75

Rev	Log message	Author	Age	Path
55	removed pre-rout and gates sims	jt_eaton	5051d 00h	/
54	now set up fpga targets from xml files	jt_eaton	5051d 01h	/
53	fixed check_fpgas	jt_eaton	5053d 15h	/
52	removed noworking sims and syn	jt_eaton	5053d 15h	/
51	removed old test	jt_eaton	5053d 15h	/
50	clean up from last checkin	jt_eaton	5053d 16h	/
49	added covered code coverage added xml descriptors added soc_Link tool	jt_eaton	5053d 19h	/
48	added support for covered code checking	jt_eaton	5076d 01h	/
47	removed old variant	jt_eaton	5090d 04h	/
46	removed hard coded component names from design files define file is always defines.v top level is always top.v	jt_eaton	5090d 04h	/