URL https://opencores.org/ocsvn/spdif_interface/spdif_interface/trunk

Subversion Repositories spdif_interface

[/] - Rev 50

Rev	Log message	Author	Age	Path
30	Added Wishbone bus cycle decoder.	gedra	7332d 06h	/
29	Wishbone bus cycle decoder.	gedra	7332d 06h	/
28	Delint'ed and changed name of architecture.	gedra	7336d 14h	/
27	Alternate dual port memory implementation for Altera FPGA's.	gedra	7337d 05h	/
26	Fixed a few bugs.	gedra	7339d 05h	/
25	Changed status reg. declaration	gedra	7339d 05h	/
24	Added channel status decoding.	gedra	7339d 05h	/
23	Added frame decoder	gedra	7339d 05h	/
22	Renamed generic	gedra	7342d 06h	/
21	Renamed generic's and modified recevier configuration register	gedra	7342d 06h	/