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Rev Log message Author Age Path
103 add testbench peripherals for P1 and P2
this became necessary to observe a difference between externally applied
port data and internally applied port data
arniml 7383d 03h /
102 update for changes in address space of external memory arniml 7383d 03h /
101 assert p2_read_p2_o when expander port is read arniml 7383d 03h /
100 reorder data_o generation arniml 7383d 03h /
99 initial check-in arniml 7383d 03h /
98 Fix bug "ANL and ORL to P1/P2 read port status instead of port output register" arniml 7383d 04h /
97 initial check-in arniml 7383d 04h /
96 select dedicated directorie(s) for regression arniml 7384d 01h /
95 check counter inactivity arniml 7384d 01h /
94 initial check-in arniml 7384d 01h /

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