OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 77

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
57 abort if no interrupt occurs arniml 7391d 18h /
56 wait for instruction strobe after final end-of-simulation detection
this ensures that the last mov instruction is part of the dump and
enables 100% matching with i8039 simulator
arniml 7392d 19h /
55 add dependency to tb_behav_pack for decoder arniml 7392d 19h /
54 - add tb_istrobe_s arniml 7392d 19h /
53 make istrobe visible through testbench package arniml 7392d 19h /
52 + fix bug in PSW[3]
+ read SP properly for dump
arniml 7392d 19h /
51 + implement Port1 and Port2
+ connect T0 and T1
+ return proper program memory contents
arniml 7392d 19h /
50 This commit was manufactured by cvs2svn to create tag 'import'. 7397d 20h /
49 Imported sources arniml 7397d 20h /
48 update copyright notice arniml 7397d 21h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.