URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

[/] - Rev 65

Rev	Log message	Author	Age	Path
45	Lots of fixes: Break condition wasn't handled correctly at all. LSR bits could lose their values. LSR value after reset was wrong. Timing of THRE interrupt signal corrected. LSR bit 0 timing corrected.	gorban	8289d 17h	/
44	fixed more typo bugs	gorban	8303d 16h	/
43	lsr1r error fixed.	mohor	8303d 23h	/
42	ti_int_pnd error fixed.	mohor	8303d 23h	/
41	ti_int_d error fixed.	mohor	8303d 23h	/
40	Synthesis bugs fixed. Some other minor changes	gorban	8306d 02h	/
39	Comments in Slovene language deleted, few small fixes for better work of old tools. IRQs need to be fix.	mohor	8307d 23h	/
38	small update to test interrupts	gorban	8308d 20h	/
37	Heavily rewritten interrupt and LSR subsystems. Many bugs hopefully squashed.	gorban	8308d 20h	/
36	no message	mohor	8314d 04h	/