OpenCores
URL https://opencores.org/ocsvn/vga_lcd/vga_lcd/trunk

Subversion Repositories vga_lcd

[/] - Rev 42

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
22 VGA Core v2.0
Document revision 0.7
rherveille 8313d 12h /
21 VGA Core v2.0
Document revision 0.7
rherveille 8313d 12h /
20 Switched parameter order. rherveille 8322d 17h /
19 Major revisions throughout the core.
Moved Color Lookup Table inside core.
Changed control & status register contents.
Changed port names to be conform to new naming convention.
Fixed bug in CAB assertion.
Changed video memory address generation.
and many more ....
rherveille 8322d 18h /
18 Removed files. They are not used anymore. rherveille 8351d 15h /
17 Major rework.
Included generic memory models.
Core now supports pixel clocks at same speed as wishbone clock (except for 8bpp color mode)
rherveille 8351d 15h /
16 - Changed Directory Structure
- Added verilog Source Code
- Changed IO pin names and defines statements
rudi 8378d 21h /
15 Created directory structure (documentation, vhdl, verilog) rherveille 8414d 11h /
14 Added CLUT bank switching.
Replaced multiplier with simple counters.
Fixed timing bug.
rherveille 8415d 06h /
13 Replaced csm.vhd by csm_pb.vhd. Core does not require CLKx2 clock anymore. rherveille 8415d 19h /

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.