URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_1/] - Rev 136

Rev	Log message	Author	Age	Path
116	change sfr's interface.	simont	7748d 03h	/8051/tags/rel_1/
115	change uart to meet timing.	simont	7748d 05h	/8051/tags/rel_1/
114	remove t2mod register	simont	7751d 08h	/8051/tags/rel_1/
113	signal prsc_ow added.	simont	7751d 08h	/8051/tags/rel_1/
112	change timers to meet timing specifications (add divider with 12)	simont	7751d 08h	/8051/tags/rel_1/
111	Remove instruction cache and wb_interface	simont	7751d 23h	/8051/tags/rel_1/
110	change adr_i and adr_o length.	simont	7751d 23h	/8051/tags/rel_1/
109	add `include "oc8051_defines.v"	simont	7751d 23h	/8051/tags/rel_1/
108	fix some bugs, use oc8051_cache_ram.	simont	7751d 23h	/8051/tags/rel_1/
107	Include instruction cache.	simont	7751d 23h	/8051/tags/rel_1/