URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_19/] [bench/] - Rev 183

Rev	Log message	Author	Age	Path
84	remove wb_bus_mon	simont	7876d 13h	/8051/tags/rel_19/bench/
74	add module oc8051_wb_iinterface	simont	7953d 11h	/8051/tags/rel_19/bench/
68	add instruction cache and DELAY parameters for external ram, rom	simont	7957d 14h	/8051/tags/rel_19/bench/
59	add external rom	simont	7964d 08h	/8051/tags/rel_19/bench/
46	prepared header	simont	7981d 10h	/8051/tags/rel_19/bench/
37	added signals ack, stb and cyc	simont	8008d 12h	/8051/tags/rel_19/bench/
4	Code repaired to satisfy the linter; testbech fails	markom	8028d 16h	/8051/tags/rel_19/bench/
2	Initial CVS import	simont	8044d 14h	/8051/tags/rel_19/bench/