URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_19/] [rtl/] - Rev 143

Rev	Log message	Author	Age	Path
118	change wr_sft to 2 bit wire.	simont	7799d 14h	/8051/tags/rel_19/rtl/
117	Register oc8051_sfr dato output, add signal wait_data.	simont	7799d 15h	/8051/tags/rel_19/rtl/
116	change sfr's interface.	simont	7801d 16h	/8051/tags/rel_19/rtl/
115	change uart to meet timing.	simont	7801d 17h	/8051/tags/rel_19/rtl/
114	remove t2mod register	simont	7804d 20h	/8051/tags/rel_19/rtl/
113	signal prsc_ow added.	simont	7804d 20h	/8051/tags/rel_19/rtl/
112	change timers to meet timing specifications (add divider with 12)	simont	7804d 20h	/8051/tags/rel_19/rtl/
110	change adr_i and adr_o length.	simont	7805d 11h	/8051/tags/rel_19/rtl/
109	add `include "oc8051_defines.v"	simont	7805d 11h	/8051/tags/rel_19/rtl/
108	fix some bugs, use oc8051_cache_ram.	simont	7805d 11h	/8051/tags/rel_19/rtl/