OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl/] - Rev 145

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
120 defines for pherypherals added simont 7750d 03h /8051/tags/rel_2/rtl/
119 remove signal sbuf_txd [12:11] simont 7750d 07h /8051/tags/rel_2/rtl/
118 change wr_sft to 2 bit wire. simont 7750d 23h /8051/tags/rel_2/rtl/
117 Register oc8051_sfr dato output, add signal wait_data. simont 7751d 00h /8051/tags/rel_2/rtl/
116 change sfr's interface. simont 7753d 01h /8051/tags/rel_2/rtl/
115 change uart to meet timing. simont 7753d 02h /8051/tags/rel_2/rtl/
114 remove t2mod register simont 7756d 05h /8051/tags/rel_2/rtl/
113 signal prsc_ow added. simont 7756d 05h /8051/tags/rel_2/rtl/
112 change timers to meet timing specifications (add divider with 12) simont 7756d 05h /8051/tags/rel_2/rtl/
110 change adr_i and adr_o length. simont 7756d 21h /8051/tags/rel_2/rtl/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.