URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl/] - Rev 178

Rev	Log message	Author	Age	Path
140	cahnge assigment to pc_wait (remove istb_o)	simont	7723d 10h	/8051/tags/rel_2/rtl/
139	add aditional alu destination to solve critical path.	simont	7724d 04h	/8051/tags/rel_2/rtl/
138	Change buffering to save one clock per instruction.	simont	7724d 04h	/8051/tags/rel_2/rtl/
137	change to fit xrom.	simont	7724d 09h	/8051/tags/rel_2/rtl/
136	registering outputs.	simont	7724d 09h	/8051/tags/rel_2/rtl/
135	prepared start of receiving if ren is not active.	simont	7730d 08h	/8051/tags/rel_2/rtl/
134	fix bug in case execution of two data dependent instructions.	simont	7730d 08h	/8051/tags/rel_2/rtl/
133	fix bug in substraction.	simont	7730d 11h	/8051/tags/rel_2/rtl/
132	change branch instruction execution (reduse needed clock periods).	simont	7734d 03h	/8051/tags/rel_2/rtl/
128	chance idat_ir to 24 bit wide	simont	7743d 10h	/8051/tags/rel_2/rtl/