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URL https://opencores.org/ocsvn/8051/8051/trunk

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[/] [8051/] [trunk/] [rtl/] [verilog/] - Rev 46

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Rev Log message Author Age Path
19 combinatorial loop removed simont 8022d 19h /8051/trunk/rtl/verilog/
17 fix some bugs simont 8026d 00h /8051/trunk/rtl/verilog/
16 inputs ram and op2 removed simont 8026d 00h /8051/trunk/rtl/verilog/
15 commbinatorial loop removed simont 8026d 00h /8051/trunk/rtl/verilog/
13 some bug fix simont 8026d 22h /8051/trunk/rtl/verilog/
12 des1_r in alu port list simont 8026d 22h /8051/trunk/rtl/verilog/
11 des2_r removed simont 8026d 23h /8051/trunk/rtl/verilog/
10 % replaced with ^ in uart; some minor improvements markom 8027d 05h /8051/trunk/rtl/verilog/
9 removed unused compare states markom 8028d 21h /8051/trunk/rtl/verilog/
8 some IDS optimizations markom 8028d 22h /8051/trunk/rtl/verilog/

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