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[/] [aemb/] [tags/] [AEMB_7_05/] - Rev 206

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Rev Log message Author Age Path
18 Moved testbench into /sim/verilog.
Simulation cleanups.		 sybreon 6284d 04h /aemb/tags/AEMB_7_05/
17 Cosmetic changes sybreon 6285d 08h /aemb/tags/AEMB_7_05/
16 Added pipeline stalling from incomplete bus cycles.
Separated sync and async portions of code.		 sybreon 6285d 20h /aemb/tags/AEMB_7_05/
15 Removed ROM file. Please generate it from the SW directory. sybreon 6292d 10h /aemb/tags/AEMB_7_05/
14 Added initial interrupt/exception support. sybreon 6292d 10h /aemb/tags/AEMB_7_05/
13 Fibonacci rom sybreon 6292d 18h /aemb/tags/AEMB_7_05/
12 Minor changes sybreon 6292d 18h /aemb/tags/AEMB_7_05/
11 Removed unused signals sybreon 6292d 18h /aemb/tags/AEMB_7_05/
10 Fixed minor bugs sybreon 6292d 18h /aemb/tags/AEMB_7_05/
9 Extended testbench code sybreon 6292d 18h /aemb/tags/AEMB_7_05/

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