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[/] [amber/] [trunk/] [hw/] - Rev 63

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Rev Log message Author Age Path
38 support 128-bit wishbone now used for a25 core csantifort 4845d 10h /amber/trunk/hw/
37 128-bit wide boot memory module csantifort 4846d 08h /amber/trunk/hw/
36 Changed boot_mem for the a25 system to be 128 bits wide to match the 128-bit wide wishbone bus csantifort 4846d 09h /amber/trunk/hw/
35 Amber25 improvements:
Use 128-bit wishbone bus, instead of 32-bit to reduce cache miss fetch times
Use a fast barrel shifter for shifts between 0 and 4 to improve timing
Use a 2 cycle full barrel shifter for complex shifts		 csantifort 4847d 16h /amber/trunk/hw/
32 Added clock cycle counting register to test_module to support dhrystone performance measurement csantifort 4850d 10h /amber/trunk/hw/
30 Bug fix - a write access was sometimes dropped when it was in a sequence of writes with variable wb_ack delays csantifort 4863d 16h /amber/trunk/hw/
29 Use lgo command for saving waveforms in modelsim csantifort 4865d 10h /amber/trunk/hw/
27 Got working with cadence nc simulator csantifort 4898d 17h /amber/trunk/hw/
25 Bug fix: boot-loader.mem became larger that the allowed 8k byte boot mem size.
Removed a struct in elfsplitter.c thats only used for debug - this reduced boot-loader.mem enough so that it fits again.
Tidy up: Removed a debug message from hw/tools/run.sh		 csantifort 4905d 15h /amber/trunk/hw/
23 Split the source files list into a Vertex-6 only list and a Spartan-6 only list.
That way users don;t need to delete files from the list manually if they only have
a setup for one of the FPGA types.		 csantifort 4907d 16h /amber/trunk/hw/

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