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Rev Log message Author Age Path
106 Unused signal removed. mohor 7702d 22h /can/tags/rel_20/
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7703d 11h /can/tags/rel_20/
102 Little fixes (to fix warnings). mohor 7706d 02h /can/tags/rel_20/
100 Synchronization changed. mohor 7710d 04h /can/tags/rel_20/
99 PCI_BIST replaced with CAN_BIST. mohor 7710d 04h /can/tags/rel_20/
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7715d 15h /can/tags/rel_20/
95 Virtual silicon ram instances added. simons 7715d 16h /can/tags/rel_20/
93 synthesis full_case parallel_case fixed. mohor 7721d 03h /can/tags/rel_20/
92 clkout is clk/2 after the reset. mohor 7721d 12h /can/tags/rel_20/
90 paralel_case and full_case compiler directives added to case statements. mohor 7722d 01h /can/tags/rel_20/

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