URL https://opencores.org/ocsvn/can/can/trunk

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[/] [can/] [tags/] [rel_24/] [rtl/] - Rev 84

Rev	Log message	Author	Age	Path
59	8051 interface added (besides WISHBONE interface). Selection is made in can_defines.v file.	mohor	7827d 10h	/can/tags/rel_24/rtl/
58	timescale.v is used for simulation only.	mohor	7827d 22h	/can/tags/rel_24/rtl/
57	Mux used for clkout to avoid "gated clocks warning".	mohor	7827d 22h	/can/tags/rel_24/rtl/
56	Doubled declarations removed.	mohor	7828d 21h	/can/tags/rel_24/rtl/
55	wire declaration added.	mohor	7828d 21h	/can/tags/rel_24/rtl/
52	tx_o is now tristated signal. tx_oen and tx_o combined together.	mohor	7833d 23h	/can/tags/rel_24/rtl/
51	Xilinx RAM added.	mohor	7833d 23h	/can/tags/rel_24/rtl/
50	Top level signal names changed.	mohor	7833d 23h	/can/tags/rel_24/rtl/
48	Actel APA ram supported.	mohor	7837d 15h	/can/tags/rel_24/rtl/
47	Data is latched on read.	mohor	7837d 16h	/can/tags/rel_24/rtl/