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[/] [can/] [tags/] [rel_3/] [rtl/] [verilog/] - Rev 163

Rev	Log message	Author	Age	Path
50	Top level signal names changed.	mohor	7819d 05h	/can/tags/rel_3/rtl/verilog/
48	Actel APA ram supported.	mohor	7822d 21h	/can/tags/rel_3/rtl/verilog/
47	Data is latched on read.	mohor	7822d 21h	/can/tags/rel_3/rtl/verilog/
45	When a dominant bit was detected at the third bit of the intermission and node had a message to transmit, bit_stuff error could occur. Fixed.	mohor	7832d 20h	/can/tags/rel_3/rtl/verilog/
44	When bit error occured while active error flag was transmitted, counter was not incremented.	mohor	7832d 21h	/can/tags/rel_3/rtl/verilog/
41	Incomplete sensitivity list fixed.	mohor	7833d 05h	/can/tags/rel_3/rtl/verilog/
40	Typo fixed.	mohor	7833d 05h	/can/tags/rel_3/rtl/verilog/
39	CAN core finished. Host interface added. Registers finished. Synchronization to the wishbone finished.	mohor	7833d 05h	/can/tags/rel_3/rtl/verilog/
36	Most of the registers added. Registers "arbitration lost capture", "error code capture" + few more still need to be added.	mohor	7834d 20h	/can/tags/rel_3/rtl/verilog/
35	Several registers added. Not finished, yet.	mohor	7838d 00h	/can/tags/rel_3/rtl/verilog/