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Rev Log message Author Age Path
26 Backup. mohor 7833d 03h /can/tags/rel_6/rtl/verilog/
25 *** empty log message *** mohor 7833d 06h /can/tags/rel_6/rtl/verilog/
24 backup. mohor 7837d 19h /can/tags/rel_6/rtl/verilog/
23 Fifo corrected to be synthesizable. mohor 7851d 02h /can/tags/rel_6/rtl/verilog/
22 Form error supported. When receiving messages, last bit of the end-of-frame
does not generate form error. Receiver goes to the idle mode one bit sooner.
(CAN specification ver 2.0, part B, page 57).
mohor 7852d 07h /can/tags/rel_6/rtl/verilog/
21 Data is stored to fifo at the end of ack stage. mohor 7852d 22h /can/tags/rel_6/rtl/verilog/
20 CRC checking fixed (when bitstuff occurs at the end of a CRC sequence). mohor 7852d 23h /can/tags/rel_6/rtl/verilog/
19 RX state machine fixed to receive "remote request" frames correctly. No data bytes are written to fifo when such frames are received. mohor 7853d 06h /can/tags/rel_6/rtl/verilog/
18 When a frame with "remote request" is received, no data is stored to fifo, just the frame information (identifier, ...). Data length that is stored is the received data length and not the actual data length that is stored to fifo. mohor 7853d 07h /can/tags/rel_6/rtl/verilog/
17 Addresses corrected to decimal values (previously hex). mohor 7854d 03h /can/tags/rel_6/rtl/verilog/

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