URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [asyst_2/] - Rev 101

Rev	Log message	Author	Age	Path
80	New version of the debug interface. Not finished, yet.	mohor	7522d 09h	/dbg_interface/tags/asyst_2/
77	MBIST chain connection fixed.	mohor	7583d 06h	/dbg_interface/tags/asyst_2/
75	Simulation files.	mohor	7583d 07h	/dbg_interface/tags/asyst_2/
74	Removed.	mohor	7583d 07h	/dbg_interface/tags/asyst_2/
73	CRC logic changed.	mohor	7583d 07h	/dbg_interface/tags/asyst_2/
71	Mbist support added.	simons	7585d 14h	/dbg_interface/tags/asyst_2/
70	A pdf copy of existing doc document.	simons	7592d 16h	/dbg_interface/tags/asyst_2/
69	WBCNTL added, multiple CPU support described.	simons	7613d 05h	/dbg_interface/tags/asyst_2/
67	Lower two address lines must be always zero.	simons	7618d 10h	/dbg_interface/tags/asyst_2/
65	WB_CNTL register added, some syncronization fixes.	simons	7619d 09h	/dbg_interface/tags/asyst_2/