URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_12/] - Rev 41

Rev	Log message	Author	Age	Path
21	CRC is returned when chain selection data is transmitted.	mohor	8299d 20h	/dbg_interface/tags/rel_12/
20	Crc generation is different for read or write commands. Small synthesys fixes.	mohor	8300d 23h	/dbg_interface/tags/rel_12/
19	Wishbone data latched on wb_clk_i instead of risc_clk.	mohor	8313d 00h	/dbg_interface/tags/rel_12/
18	Reset signals are not combined any more.	mohor	8315d 09h	/dbg_interface/tags/rel_12/
17	dbg_timescale.v changed to timescale.v This is done for the simulation of few different cores in a single project.	mohor	8338d 22h	/dbg_interface/tags/rel_12/
16	bs_chain_o port added.	mohor	8340d 22h	/dbg_interface/tags/rel_12/
15	bs_chain_o added.	mohor	8340d 23h	/dbg_interface/tags/rel_12/
14	Document updated.	mohor	8341d 21h	/dbg_interface/tags/rel_12/
13	Signal names changed to lowercase.	mohor	8342d 00h	/dbg_interface/tags/rel_12/
12	Wishbone interface added, few fixes for better performance, hooks for boundary scan testing added.	mohor	8343d 00h	/dbg_interface/tags/rel_12/