OpenCores
URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_21/] - Rev 101

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
80 New version of the debug interface. Not finished, yet. mohor 7494d 08h /dbg_interface/tags/rel_21/
77 MBIST chain connection fixed. mohor 7555d 04h /dbg_interface/tags/rel_21/
75 Simulation files. mohor 7555d 06h /dbg_interface/tags/rel_21/
74 Removed. mohor 7555d 06h /dbg_interface/tags/rel_21/
73 CRC logic changed. mohor 7555d 06h /dbg_interface/tags/rel_21/
71 Mbist support added. simons 7557d 12h /dbg_interface/tags/rel_21/
70 A pdf copy of existing doc document. simons 7564d 14h /dbg_interface/tags/rel_21/
69 WBCNTL added, multiple CPU support described. simons 7585d 03h /dbg_interface/tags/rel_21/
67 Lower two address lines must be always zero. simons 7590d 08h /dbg_interface/tags/rel_21/
65 WB_CNTL register added, some syncronization fixes. simons 7591d 07h /dbg_interface/tags/rel_21/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.