URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_6/] [rtl/] [verilog/] - Rev 158

Rev	Log message	Author	Age	Path
36	Structure changed. Hooks for jtag chain added.	mohor	8145d 21h	/dbg_interface/tags/rel_6/rtl/verilog/
33	LatchedJTAG_IR used when muxing TDO instead of JTAG_IR.	mohor	8176d 01h	/dbg_interface/tags/rel_6/rtl/verilog/
32	Stupid bug that was entered by previous update fixed.	mohor	8176d 23h	/dbg_interface/tags/rel_6/rtl/verilog/
31	trst synchronization is not needed and was removed.	mohor	8177d 00h	/dbg_interface/tags/rel_6/rtl/verilog/
30	IDCODE bug fixed, chains reused to decreas size of core. Data is shifted-in not filled-in. Tested in hw.	mohor	8188d 05h	/dbg_interface/tags/rel_6/rtl/verilog/
28	TDO and TDO Enable signal are separated into two signals.	mohor	8224d 02h	/dbg_interface/tags/rel_6/rtl/verilog/
27	Warnings from synthesys tools fixed.	mohor	8238d 03h	/dbg_interface/tags/rel_6/rtl/verilog/
26	Warnings from synthesys tools fixed.	mohor	8238d 03h	/dbg_interface/tags/rel_6/rtl/verilog/
25	trst signal is synchronized to wb_clk_i.	mohor	8238d 23h	/dbg_interface/tags/rel_6/rtl/verilog/
23	Trace disabled by default.	mohor	8246d 03h	/dbg_interface/tags/rel_6/rtl/verilog/