URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [trunk/] - Rev 94

Rev	Log message	Author	Age	Path
70	A pdf copy of existing doc document.	simons	7573d 11h	/dbg_interface/trunk/
69	WBCNTL added, multiple CPU support described.	simons	7594d 00h	/dbg_interface/trunk/
67	Lower two address lines must be always zero.	simons	7599d 04h	/dbg_interface/trunk/
65	WB_CNTL register added, some syncronization fixes.	simons	7600d 04h	/dbg_interface/trunk/
63	Three more chains added for cpu debug access.	simons	7620d 05h	/dbg_interface/trunk/
61	Lapsus fixed.	simons	7648d 04h	/dbg_interface/trunk/
59	Reset value for riscsel register set to 1.	simons	7648d 05h	/dbg_interface/trunk/
57	Multiple cpu support added.	simons	7648d 06h	/dbg_interface/trunk/
56	Revision 1.6. Trst changed to active high !!!. In order to be compliant with the standard, reset needs to be negated on the upper layer.	mohor	7915d 02h	/dbg_interface/trunk/
55	Revision 1.6. Trst changed to active high !!!. In order to be compliant with the standard, reset needs to be negated on the upper layer.	mohor	7915d 03h	/dbg_interface/trunk/