URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_12/] [rtl/] [verilog/] - Rev 125

Rev	Log message	Author	Age	Path
96	Any address can be used for Tx and Rx BD pointers. Address does not need to be aligned.	mohor	8097d 03h	/ethmac/tags/rel_12/rtl/verilog/
95	md_padoen_o changed to md_padoe_o. Signal was always active high, just name was incorrect.	mohor	8097d 06h	/ethmac/tags/rel_12/rtl/verilog/
94	When clear and read/write are active at the same time, cnt and pointers are set to 1.	mohor	8097d 06h	/ethmac/tags/rel_12/rtl/verilog/
93	When in promiscous mode some frames were not received correctly. Fixed.	mohor	8102d 04h	/ethmac/tags/rel_12/rtl/verilog/
92	Some defines that are used in testbench only were moved to tb_eth_defines.v file.	mohor	8103d 07h	/ethmac/tags/rel_12/rtl/verilog/
91	Comments in Slovene language removed.	mohor	8103d 07h	/ethmac/tags/rel_12/rtl/verilog/
90	casex changed with case, fifo reset changed.	mohor	8103d 07h	/ethmac/tags/rel_12/rtl/verilog/
88	rx_fifo was not always cleared ok. Fixed.	mohor	8113d 03h	/ethmac/tags/rel_12/rtl/verilog/
87	Status was not latched correctly sometimes. Fixed.	mohor	8113d 06h	/ethmac/tags/rel_12/rtl/verilog/
86	Big Endian problem when sending frames fixed.	mohor	8114d 13h	/ethmac/tags/rel_12/rtl/verilog/