OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_18/] - Rev 67

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
47 HASH0 and HASH1 registers added. Registers address width was
changed to 8 bits.		 mohor 8185d 01h /ethmac/tags/rel_18/
46 HASH0 and HASH1 registers added. mohor 8185d 01h /ethmac/tags/rel_18/
45 Ethernet Datasheet added. mohor 8185d 07h /ethmac/tags/rel_18/
44 Ethernet Datasheet added to cvs. mohor 8185d 07h /ethmac/tags/rel_18/
43 Tx status is written back to the BD. mohor 8186d 08h /ethmac/tags/rel_18/
42 Rx status is written back to the BD. mohor 8189d 01h /ethmac/tags/rel_18/
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8191d 04h /ethmac/tags/rel_18/
40 Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200
MHz. Statuses, overrun, control frame transmission and reception still need
to be fixed.		 mohor 8192d 01h /ethmac/tags/rel_18/
39 Tx part finished. TxStatus needs to be fixed. Pause request needs to be
added.		 mohor 8196d 05h /ethmac/tags/rel_18/
38 Initial version. Equals to eth_wishbonedma.v at this moment. mohor 8205d 07h /ethmac/tags/rel_18/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.