OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_18/] [rtl/] - Rev 70

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
47 HASH0 and HASH1 registers added. Registers address width was
changed to 8 bits.
mohor 8163d 09h /ethmac/tags/rel_18/rtl/
46 HASH0 and HASH1 registers added. mohor 8163d 09h /ethmac/tags/rel_18/rtl/
43 Tx status is written back to the BD. mohor 8164d 16h /ethmac/tags/rel_18/rtl/
42 Rx status is written back to the BD. mohor 8167d 09h /ethmac/tags/rel_18/rtl/
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8169d 11h /ethmac/tags/rel_18/rtl/
40 Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200
MHz. Statuses, overrun, control frame transmission and reception still need
to be fixed.
mohor 8170d 09h /ethmac/tags/rel_18/rtl/
39 Tx part finished. TxStatus needs to be fixed. Pause request needs to be
added.
mohor 8174d 13h /ethmac/tags/rel_18/rtl/
38 Initial version. Equals to eth_wishbonedma.v at this moment. mohor 8183d 15h /ethmac/tags/rel_18/rtl/
37 Link in the header changed. mohor 8183d 15h /ethmac/tags/rel_18/rtl/
34 RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
instead of the number of RX descriptors).
mohor 8232d 11h /ethmac/tags/rel_18/rtl/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.