URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_24/] [bench/] [verilog/] - Rev 194

Rev	Log message	Author	Age	Path
116	Testing environment also includes traffic cop, memory interface and host interface.	mohor	8003d 15h	/ethmac/tags/rel_24/bench/verilog/
108	Testbench supports unaligned accesses.	mohor	8080d 19h	/ethmac/tags/rel_24/bench/verilog/
107	TX_BUF_BASE changed.	mohor	8080d 19h	/ethmac/tags/rel_24/bench/verilog/
92	Some defines that are used in testbench only were moved to tb_eth_defines.v file.	mohor	8125d 16h	/ethmac/tags/rel_24/bench/verilog/
80	Small fixes for external/internal DMA missmatches.	mohor	8146d 12h	/ethmac/tags/rel_24/bench/verilog/
67	EXTERNAL_DMA used instead of WISHBONE_DMA.	mohor	8156d 16h	/ethmac/tags/rel_24/bench/verilog/
66	Testbench fixed, code simplified, unused signals removed.	mohor	8156d 22h	/ethmac/tags/rel_24/bench/verilog/
51	Added separate tests for Multicast, Unicast, Broadcast	billditt	8158d 09h	/ethmac/tags/rel_24/bench/verilog/
49	HASH0 and HASH1 register read/write added.	mohor	8160d 09h	/ethmac/tags/rel_24/bench/verilog/
41	non-DMA host interface added. Select the right configutation in eth_defines.	mohor	8166d 15h	/ethmac/tags/rel_24/bench/verilog/