URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_27/] [rtl/] [verilog/] - Rev 146

Rev	Log message	Author	Age	Path
118	ShiftEnded synchronization changed.	mohor	7996d 22h	/ethmac/tags/rel_27/rtl/verilog/
115	RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset.	mohor	7998d 07h	/ethmac/tags/rel_27/rtl/verilog/
114	EXTERNAL_DMA removed. External DMA not supported.	mohor	7999d 04h	/ethmac/tags/rel_27/rtl/verilog/
113	RxPointer bug fixed.	mohor	8005d 20h	/ethmac/tags/rel_27/rtl/verilog/
112	Previous bug wasn't succesfully removed. Now fixed.	mohor	8006d 10h	/ethmac/tags/rel_27/rtl/verilog/
111	Master state machine had a bug when switching from master write to master read.	mohor	8006d 23h	/ethmac/tags/rel_27/rtl/verilog/
110	m_wb_cyc_o signal released after every single transfer.	mohor	8007d 02h	/ethmac/tags/rel_27/rtl/verilog/
109	Comment removed.	mohor	8007d 03h	/ethmac/tags/rel_27/rtl/verilog/
106	Outputs registered. Reset changed for eth_wishbone module.	mohor	8074d 13h	/ethmac/tags/rel_27/rtl/verilog/
105	Compiler directives added. Tx and Rx fifo size incremented. A "late collision" bug fixed.	mohor	8083d 14h	/ethmac/tags/rel_27/rtl/verilog/