URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_5/] [rtl/] [verilog/] - Rev 95

Rev	Log message	Author	Age	Path
73	Number of interrupts changed	mohor	8142d 16h	/ethmac/tags/rel_5/rtl/verilog/
72	Retry is not activated when a Tx Underrun occured	mohor	8146d 19h	/ethmac/tags/rel_5/rtl/verilog/
70	Small fixes.	mohor	8150d 22h	/ethmac/tags/rel_5/rtl/verilog/
69	Define missmatch fixed.	mohor	8151d 19h	/ethmac/tags/rel_5/rtl/verilog/
68	Registered trimmed. Unused registers removed.	mohor	8152d 18h	/ethmac/tags/rel_5/rtl/verilog/
67	EXTERNAL_DMA used instead of WISHBONE_DMA.	mohor	8152d 19h	/ethmac/tags/rel_5/rtl/verilog/
65	Testbench fixed, code simplified, unused signals removed.	mohor	8153d 01h	/ethmac/tags/rel_5/rtl/verilog/
64	Status was not written correctly when frames were discarted because of address mismatch.	mohor	8153d 15h	/ethmac/tags/rel_5/rtl/verilog/
63	RxAbort is connected differently.	mohor	8153d 18h	/ethmac/tags/rel_5/rtl/verilog/
62	RxAbort is an output. No need to have is declared as wire.	mohor	8153d 19h	/ethmac/tags/rel_5/rtl/verilog/