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[/] [ethmac/] [tags/] [rel_7/] [rtl/] [verilog/] - Rev 97

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Rev Log message Author Age Path
75 r_Bro is used for accepting/denying frames mohor 8133d 00h /ethmac/tags/rel_7/rtl/verilog/
74 Reset values are passed to registers through parameters mohor 8133d 00h /ethmac/tags/rel_7/rtl/verilog/
73 Number of interrupts changed mohor 8133d 01h /ethmac/tags/rel_7/rtl/verilog/
72 Retry is not activated when a Tx Underrun occured mohor 8137d 04h /ethmac/tags/rel_7/rtl/verilog/
70 Small fixes. mohor 8141d 06h /ethmac/tags/rel_7/rtl/verilog/
69 Define missmatch fixed. mohor 8142d 03h /ethmac/tags/rel_7/rtl/verilog/
68 Registered trimmed. Unused registers removed. mohor 8143d 03h /ethmac/tags/rel_7/rtl/verilog/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8143d 04h /ethmac/tags/rel_7/rtl/verilog/
65 Testbench fixed, code simplified, unused signals removed. mohor 8143d 09h /ethmac/tags/rel_7/rtl/verilog/
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8144d 00h /ethmac/tags/rel_7/rtl/verilog/

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