URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] - Rev 129

Rev	Log message	Author	Age	Path
101	Short frame and ReceivedLengthOK were not detected correctly.	mohor	8110d 05h	/ethmac/trunk/rtl/verilog/
100	Generic ram or Xilinx ram can be used in fifo (selectable by setting ETH_FIFO_XILINX in eth_defines.v).	mohor	8110d 05h	/ethmac/trunk/rtl/verilog/
97	Small typo fixed.	lampret	8134d 03h	/ethmac/trunk/rtl/verilog/
96	Any address can be used for Tx and Rx BD pointers. Address does not need to be aligned.	mohor	8138d 03h	/ethmac/trunk/rtl/verilog/
95	md_padoen_o changed to md_padoe_o. Signal was always active high, just name was incorrect.	mohor	8138d 06h	/ethmac/trunk/rtl/verilog/
94	When clear and read/write are active at the same time, cnt and pointers are set to 1.	mohor	8138d 06h	/ethmac/trunk/rtl/verilog/
93	When in promiscous mode some frames were not received correctly. Fixed.	mohor	8143d 04h	/ethmac/trunk/rtl/verilog/
92	Some defines that are used in testbench only were moved to tb_eth_defines.v file.	mohor	8144d 06h	/ethmac/trunk/rtl/verilog/
91	Comments in Slovene language removed.	mohor	8144d 06h	/ethmac/trunk/rtl/verilog/
90	casex changed with case, fifo reset changed.	mohor	8144d 06h	/ethmac/trunk/rtl/verilog/