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[/] [ha1588/] - Rev 53

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33 Redefined memory map. RTC and TSU now have separate address spans, can be easily divided into to independent modules. edn_walter 4463d 14h /ha1588/
32 Added PTP standard time format output to the top module. Can be connected to external modules. edn_walter 4463d 17h /ha1588/
31 Added hand-shaking for the TSU data reading. edn_walter 4464d 10h /ha1588/
30 Timestamp format in the queue = msgId_4bit + seqId_16bit + null_8bit + timeStamp1s_4bit + null_2bit + timeStamp1ns_30bit edn_walter 4464d 10h /ha1588/
29 Added multicycle timing constraint to ptp_parser.v, which works at data rate of (32bit * 4 gmii_clk cycle). Fmax can exceed 250MHz. edn_walter 4464d 10h /ha1588/
28 Before changing TSU packet parser datapath width from 32b to 8b. edn_walter 4464d 17h /ha1588/
27 Added more bits to the TSU queue information, of which timestamp value is enlarged from 4s to 64s. edn_walter 4464d 17h /ha1588/
26 Updated test case. edn_walter 4466d 12h /ha1588/
25 Updated SOPC Builder component and example system. edn_walter 4467d 11h /ha1588/
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4467d 12h /ha1588/

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