URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

[/] [ha1588/] - Rev 65

Rev	Log message	Author	Age	Path
45	1. optimized area, by removing unused registers. 2. optimized timing, by removing latches.	edn_walter	4483d 01h	/ha1588/
44	Updated TSU testbench.	edn_walter	4483d 04h	/ha1588/
43	Added software configurable PTP message id mask for TSU parser.	edn_walter	4484d 02h	/ha1588/
42	Updated RTC testbench. Shrunk 1s to 1us to simulate more cycles during a short time.	edn_walter	4484d 08h	/ha1588/
41	Added pre-adder to the accumulator to cut down critical timing path.	edn_walter	4484d 09h	/ha1588/
40	Release version 1.1	edn_walter	4484d 13h	/ha1588/
39	1. Added memory map and feature description. 2. Separated TX RX TSU register addresses.	edn_walter	4484d 13h	/ha1588/
38	1. Redefined the memory map. See changes in reg.v and ptp_drv_bfm.c. 2. Added adj_done signal for CPU polling. 3. Making time_acc_modulo a constant = 256,000,000,000. No need to change it from software side.	edn_walter	4485d 11h	/ha1588/
37	Timestamp format in the queue = null_16bit + timeStamp1s_48bit + timeStamp1ns_32bit + msgId_4bit + ckSum_12bit + seqId_16bit	edn_walter	4485d 14h	/ha1588/
36	TSU testbench is now self-checking. Test result is reported at end of simulation.	edn_walter	4486d 09h	/ha1588/