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[/] [ha1588/] [trunk/] [sim/] [top/] - Rev 68

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24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4485d 08h /ha1588/trunk/sim/top/
23 Added CDC hand-shaking for RTC time reading operation. edn_walter 4486d 02h /ha1588/trunk/sim/top/
22 RTC reset will clear ACC counter, but not clear ACC counter incremental. edn_walter 4486d 06h /ha1588/trunk/sim/top/
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 4487d 02h /ha1588/trunk/sim/top/
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.
edn_walter 4498d 02h /ha1588/trunk/sim/top/

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