URL https://opencores.org/ocsvn/ion/ion/trunk

Subversion Repositories ion

[/] [ion/] [trunk/] - Rev 161

Rev	Log message	Author	Age	Path
141	BUG FIX in cache: cpu stall logic was missing key case 2nd SW in a (cached) row was not being stalled	ja_rd	4784d 21h	/ion/trunk/
140	BUG FIX in cpu: MTCx was using Rs as source instead of Rt BUG FIX in cpu: cached sequences of S* were failing, byte_we logic was wrong	ja_rd	4784d 21h	/ion/trunk/
139	updated simulation & synthesis pre-generated entities ('hello' code sample)	ja_rd	4785d 15h	/ion/trunk/
138	updated simulation & synthesis pre-generated entities ('hello' code sample)	ja_rd	4785d 15h	/ion/trunk/
137	Updated TB2 for new cache interface ('unmapped' signal)	ja_rd	4785d 15h	/ion/trunk/
136	Added debug output to synthesizable MPU template, and connected debug signals to LEDs	ja_rd	4785d 15h	/ion/trunk/
135	Added debug output to synthesizable MPU template.	ja_rd	4785d 15h	/ion/trunk/
134	Added 'unmapped access' flag to CPU core, meant for debug mostly. Eventually this flag will trigger an interrupt.	ja_rd	4785d 15h	/ion/trunk/
133	First draft of the SDRAM controller (Still unused in the code working base)	ja_rd	4788d 12h	/ion/trunk/
132	Fixed bug in stall logic (stall for back-to-back SW instructions was wrong)	ja_rd	4788d 12h	/ion/trunk/