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[/] [ion/] [trunk/] [vhdl/] - Rev 95

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Rev Log message Author Age Path
57 updated precompiled demo:
single 32-bit BROM instead of 4x8-bit
ja_rd 4942d 01h /ion/trunk/vhdl/
48 Temporary fix to memory decoding constants ja_rd 4942d 05h /ion/trunk/vhdl/
47 Pre-generated simulation test benches updated ja_rd 4942d 05h /ion/trunk/vhdl/
46 First version of cache: stub, 1-word cache
Stub cache tested on simulation and HW, just a stub
Adapted CPU stall logic to 1st version of cache
Adapted all other modules for compatibility with cache
ja_rd 4942d 05h /ion/trunk/vhdl/
43 added comments to dummy 'cache' stub ja_rd 4944d 13h /ion/trunk/vhdl/
42 Added cache stub module, plus related test bench ja_rd 4946d 07h /ion/trunk/vhdl/
40 pre-generated 'hello' demo updated ja_rd 4946d 07h /ion/trunk/vhdl/
37 functions added to package for standard address decoding ja_rd 4946d 08h /ion/trunk/vhdl/
36 pre-generated simulation test bench TB1 updated
for compatibility to other changes
ja_rd 4946d 08h /ion/trunk/vhdl/
35 CPU mem_wait logic updated to work with cache ja_rd 4946d 08h /ion/trunk/vhdl/

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