OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] - Rev 75

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
51 true dual port ram for xilinx JonasDC 4135d 05h /mod_sim_exp/trunk/
50 added folder for ram descriptions
added experimental simple dual port ram implementation for xilinx
JonasDC 4135d 05h /mod_sim_exp/trunk/
47 added documentation for the IP core. JonasDC 4215d 05h /mod_sim_exp/trunk/
46 chance run_auto port or mod_sim_exp_core to exp_m JonasDC 4215d 05h /mod_sim_exp/trunk/
45 chance run_auto port or mod_sim_exp_core to exp_m JonasDC 4215d 05h /mod_sim_exp/trunk/
44 toplevel of the Modular Simultaneous Exponentiation IP core for the PLB interface JonasDC 4218d 22h /mod_sim_exp/trunk/
43 made the core parameters generics JonasDC 4218d 22h /mod_sim_exp/trunk/
42 corrected wrong library name for mod_sim_exp_pkg JonasDC 4225d 06h /mod_sim_exp/trunk/
41 removed deprecated files from version control JonasDC 4225d 06h /mod_sim_exp/trunk/
40 adjusted core instantiation to new core module name JonasDC 4233d 10h /mod_sim_exp/trunk/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.