URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] - Rev 178

Rev	Log message	Author	Age	Path
158	synchronize binutils/opcodes with gnu dev tree of 2.21.53.20110828	khays	4716d 02h	/open8_urisc/
157	synchronize binutils/ld with gnu dev tree of 2.21.53.20110828	khays	4716d 02h	/open8_urisc/
156	Optimized for timing, Flattened block structure to single entity.	jshamlet	4748d 22h	/open8_urisc/
155	Fixed additional interrupt logic bug, Optimized several blocks - including ALU, stack, program counter, and data path.	jshamlet	4749d 17h	/open8_urisc/
154	Fixed problem with missing data path override in interrupt logic. Should resolve issues with processor crashing when an interrupt occurs as a STO instruction is being executed.	jshamlet	4754d 20h	/open8_urisc/
153	Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded, Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered.	jshamlet	4781d 16h	/open8_urisc/
152	Correct the descriptions for GMSK and SMSK instructions in the Open8 Assembly Language Reference	khays	4789d 18h	/open8_urisc/
151	Fixed STO instruction and interrupt logic to avoid address bus corruption issues.	jshamlet	4791d 19h	/open8_urisc/
150	Updated the assembly language reference to add the CLR pseudo-mnemonic	khays	4792d 02h	/open8_urisc/
149	added clr "Clear Accumulator" pseudo-instruction	khays	4792d 04h	/open8_urisc/