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[/] [open8_urisc/] [trunk/] - Rev 217

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Rev Log message Author Age Path
197 Fixed incorrect comments jshamlet 1548d 17h /open8_urisc/trunk/
196 Modified the update logic to allow direct writes to offset 0xFE for refreshing the clock status. This way, any write to the clock status register will immediately be undone. (Writing 0x00 to offset 0xFF is once-more ignored) jshamlet 1548d 17h /open8_urisc/trunk/
195 Added dual-port RAM core for SDLC interface. jshamlet 1549d 12h /open8_urisc/trunk/
194 Cleaned up licensing sections jshamlet 1549d 12h /open8_urisc/trunk/
193 Fixed incorrect comment in o8_alu16.vhd. The value of the write to 0x1F doesn't matter, as the write itself triggers the calculation. jshamlet 1549d 12h /open8_urisc/trunk/
192 Added SDLC packet engine jshamlet 1549d 13h /open8_urisc/trunk/
191 Cleaned up comments, added back the OPEN8_NULLBUS constant, and added some new modules for ADCs and LCD displays.
Also made the button input module more configurable by moving the debounce code to a separate entity and using generics to instantiate it.		 jshamlet 1549d 13h /open8_urisc/trunk/
190 Fixed a bug in CPU where RTI/RTS wasn't idling the instruction cache, causing intermittent failures where RTI would execute as RTS, corrupting the stack;
Fixed a bug in the real-time clock where the uSec tick generator would stop if the PIT timer value was left/set to 0x00.		 jshamlet 1561d 10h /open8_urisc/trunk/
189 Merged changes from private repository,
added ceil_log2 function to Open8_pkg, since it is used to calculate RAM vectors,
cleaned up comments and removed local copies of the ceil_log2 function from peripherals.		 jshamlet 1562d 11h /open8_urisc/trunk/
188 Added a generic to alter the behavior of RTI so that it can optionally skip restoring the general purpose flags GP4 to GP7, allowing ISR's to make persistent changes to them. Also exported these flags to the top level for use outside the CPU. jshamlet 1562d 13h /open8_urisc/trunk/

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