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[/] [open8_urisc/] [trunk/] [VHDL/] - Rev 206

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Rev Log message Author Age Path
186 Merged the interrupt override logic into the case structure, simplifying how interrupts are processed. jshamlet 1593d 03h /open8_urisc/trunk/VHDL/
185 1) Fixed an apparently long-standing bug where the interrupt bit wasn't being cleared after an RTI
2) Modified the program counter logic to be simpler. It now always increments, and states control the increment using the offset field. A new set of constants was added to replace the old states.
3) Modified the ALU to always use Operand1 instead of ALU_Ctrl.Data (and removed the field in the record). A new ALU command, ALU_GMSK, was added, as it was the only instruction to set the .Data field to something other than Operand1 (Int_Mask)
4) Modified the package file so that flag names match what the assembler calls them. FL_Z is now PSR_Z, FL_GP1 is now PSR_GP4, etc.
5) Cleaned up the comments and code formatting		 jshamlet 1593d 05h /open8_urisc/trunk/VHDL/
184 More file/entity renaming to match private versions. jshamlet 1595d 05h /open8_urisc/trunk/VHDL/
183 Renamed core to o8_cpu to match new naming scheme jshamlet 1595d 06h /open8_urisc/trunk/VHDL/
182 Simplified the address generation logic at the expense of making LDX take one additional clock cycle. This allowed the address logic to be split out of the main state machine and simplified (greatly). During this process, a bug in SDO was found and fixed that caused it to return through the wrong pipe fill state wnen auto increment was disabled. jshamlet 1595d 06h /open8_urisc/trunk/VHDL/
181 Altered the RSP instruction to allow the stack pointed to either be restored from registers or stored to registers based on the status of a processor bit. Also modified LDX to simplify the address logic. jshamlet 1596d 02h /open8_urisc/trunk/VHDL/
180 Added additional Open8 compatible modules jshamlet 1600d 06h /open8_urisc/trunk/VHDL/
177 Fixed comments in RTC module jshamlet 2920d 06h /open8_urisc/trunk/VHDL/
176 Fixed documentation errors,
Modified uSec_Tick such that it is always generated regardless of the interval.		 jshamlet 2925d 04h /open8_urisc/trunk/VHDL/
175 Added 4 and 8-bit LCD interfaces with backlight and contrast DACs jshamlet 2925d 08h /open8_urisc/trunk/VHDL/

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