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19 Creates an LED mask portion of writing to the LED's register. Only those
bits specified in the mask (bits [7:4]) will be adjusted in the LED
register on a write. Hence to set all on, set the LED register to 0x0ff,
all off, 0x0f0, or to set LED 0 to on while leaving the others unchanged,
set it to 0x011.		 dgisselq 2941d 19h /openarty/
18 The device can now program and configure itself, allowing bootstrap possibilities.
`		 dgisselq 2941d 19h /openarty/
17 Fixed the misaddressed I/O peripherals in the fastio peripheral group. In
particular, UART and GPS were misaddressed. This has now been fixed, so these
peripherals (should) match the spec. Further, the default speed of the two
UARTs has been adjusted to 115200/8N1 for the aux UART, and 9600/8N1 for the
GPS UART. The Aux UART transmitter also passes testing, so at least that one
works.		 dgisselq 2943d 18h /openarty/
16 This returns the scope to its original configuration, where the decode()
function is not allowed to have any side effects.		 dgisselq 2943d 19h /openarty/
15 These files were changed/perfected as part of getting the EQSPI flash driver
up and running. They currently match the hardware, as far as I can tell, and
the test bench (_tb.cpp file) shows that the Verilog modules work (with the
simulated hardware) as designed.		 dgisselq 2943d 20h /openarty/
14 All changes made as a part of getting the flash driver up and running. Today,
it successfully programmed a configuration into the Arty via wbprogram, so ...
that's been my last/best test.		 dgisselq 2943d 20h /openarty/
13 Here are the updates necessary to get the initial Quad SPI flash driver working.
This includes in particular the bus interconnect (in fastmaster.v), and the
final hookup to the external wires (in fasttop.v).		 dgisselq 2943d 20h /openarty/
12 A work in progress. This checkin contains fixes for the flash (mostly),
together with some logic reductions facilitating full speed (200MHz) build.		 dgisselq 2944d 23h /openarty/
11 Files necessary to simulate the entire Arty board--everything at the fastmaster
module and below.		 dgisselq 2944d 23h /openarty/
10 Updated flash data and test files, for a flash that produces it's answers a
clock after I'm expecting them.		 dgisselq 2944d 23h /openarty/

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