URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] - Rev 125

Rev	Log message	Author	Age	Path
105	Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions. These were not problematic but this is simply cleaner that way.	olivier.girard	4892d 07h	/openmsp430/
104	Update all FPGA example projects with the latest RTL version.	olivier.girard	4896d 08h	/openmsp430/
103	Removed the timescale from all RTL files. Added possibility to exclude the "includes" statements from the RTL.	olivier.girard	4897d 14h	/openmsp430/
102	Fixed bug reported by Mihai ( http://opencores.org/bug,view,1955 ). The following PUSH instructions are now working as expected: - indexed mode: PUSH x(R1) - indirect register mode: PUSH @R1 - indirect autoincrement: PUSH @R1+	olivier.girard	4898d 06h	/openmsp430/
101	Cosmetic change in order to prevent an X propagation whenever executing a byte instruction with an uninitialized memory location as source.	olivier.girard	4898d 08h	/openmsp430/
100	Update HTML documentation with Actel's FPGA implementation example (file & directory description section).	olivier.girard	4901d 07h	/openmsp430/
99	Small fix for CVER simulator support.	olivier.girard	4902d 08h	/openmsp430/
98	Added support for VCS verilog simulator. VPD and TRN waveforms can now be generated.	olivier.girard	4902d 08h	/openmsp430/
97	Update Tools' Windows executables with EraseROM command fix.	olivier.girard	4903d 08h	/openmsp430/
96	Fixed EraseROM command in the TCL library of the Software development tools.	olivier.girard	4903d 08h	/openmsp430/