URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] - Rev 227

Rev	Log message	Author	Age	Path
207	Simulation now works seamlessly under Linux, OS-X and Windows (Cygwin)	olivier.girard	3149d 22h	/openmsp430/trunk/
206	Update ChangeLog	olivier.girard	3246d 22h	/openmsp430/trunk/
205	Thanks again to Johan W. good feedback, the following updates are implemented: - Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment. - Update oscillators enable generation to relax a critical timing paths in the ASIC version. - Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).	olivier.girard	3246d 22h	/openmsp430/trunk/
204	Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that).	olivier.girard	3253d 22h	/openmsp430/trunk/
203	Update ChangeLog	olivier.girard	3260d 22h	/openmsp430/trunk/
202	Add DMA interface support + LINT cleanup	olivier.girard	3260d 22h	/openmsp430/trunk/
201	Update ChangeLog	olivier.girard	3421d 21h	/openmsp430/trunk/
200	Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains.	olivier.girard	3421d 21h	/openmsp430/trunk/
199	Update ChangeLog	olivier.girard	3527d 23h	/openmsp430/trunk/
198	Update GDB-Proxy to support new GCC/GDB compiler version from RedHat/TI	olivier.girard	3528d 00h	/openmsp430/trunk/