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[/] [openmsp430/] [trunk/] [core/] [rtl/] - Rev 200

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Rev Log message Author Age Path
103 Removed the timescale from all RTL files.
Added possibility to exclude the "includes" statements from the RTL.		 olivier.girard 4851d 08h /openmsp430/trunk/core/rtl/
102 Fixed bug reported by Mihai ( http://opencores.org/bug,view,1955 ).
The following PUSH instructions are now working as expected:

- indexed mode: PUSH x(R1)
- indirect register mode: PUSH @R1
- indirect autoincrement: PUSH @R1+		 olivier.girard 4852d 01h /openmsp430/trunk/core/rtl/
101 Cosmetic change in order to prevent an X propagation whenever executing a byte instruction with an uninitialized memory location as source. olivier.girard 4852d 03h /openmsp430/trunk/core/rtl/
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.		 olivier.girard 4864d 03h /openmsp430/trunk/core/rtl/
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4887d 00h /openmsp430/trunk/core/rtl/
85 Diverse RTL cosmetic updates. olivier.girard 4887d 02h /openmsp430/trunk/core/rtl/
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4892d 03h /openmsp430/trunk/core/rtl/
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4953d 03h /openmsp430/trunk/core/rtl/
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5040d 03h /openmsp430/trunk/core/rtl/
72 Expand configurability options of the program and data memory sizes. olivier.girard 5067d 04h /openmsp430/trunk/core/rtl/

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