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[/] [openmsp430/] [trunk/] [fpga/] - Rev 177

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Rev Log message Author Age Path
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.		 olivier.girard 4788d 07h /openmsp430/trunk/fpga/
109 Update Xilinx FPGA example with the latest openMSP430 core RTL version. olivier.girard 4842d 16h /openmsp430/trunk/fpga/
108 Add serial debug interface tasks to the Actel fpga simulation environment. olivier.girard 4844d 05h /openmsp430/trunk/fpga/
107 Update Actel and Alter FPGA examples with the latest openMSP430 core RTL version. olivier.girard 4844d 05h /openmsp430/trunk/fpga/
106 Separated the Timer A defines from the openMSP430 ones.
Added the "dbg_en" port in order to allow a separate reset of the debug interface.
Added the "core_en" port (when cleared, the CPU will stop execution, the dbg_freeze signal will be set and the aclk & smclk will be stopped).
Renamed "per_wen" to "per_we" to prevent confusion with active low signals.
Removed to missing unused flops when the DBG_EN is not defined (thanks to Mihai contribution).		 olivier.girard 4844d 06h /openmsp430/trunk/fpga/
105 Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions.
These were not problematic but this is simply cleaner that way.		 olivier.girard 4859d 07h /openmsp430/trunk/fpga/
104 Update all FPGA example projects with the latest RTL version. olivier.girard 4863d 08h /openmsp430/trunk/fpga/
100 Update HTML documentation with Actel's FPGA implementation example (file & directory description section). olivier.girard 4868d 07h /openmsp430/trunk/fpga/
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.		 olivier.girard 4869d 08h /openmsp430/trunk/fpga/
96 Fixed EraseROM command in the TCL library of the Software development tools. olivier.girard 4870d 07h /openmsp430/trunk/fpga/

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